Xillinx Processor
Micro Blaze Soft Processor Core
Micro Blaze™ is the industry-leader in FPGA-based soft
processors, with advanced architecture options like AXI or PLB
interface, Memory Management Unit (MMU), instruction and data-side
cache, configurable pipeline depth, Floating-Point unit (FPU), and much
more. MicroBlaze is a 32-bit RISC Harvard architecture soft processor
core that is included free with both Vivado Design Edition and IDS
Embedded Edition. Highly flexible architecture, plus a rich instruction
set optimized for embedded applications, delivers the exact processing
system you need at the lowest system cost possible.
High-Performance, Small Footprint, or something In-between?
MicroBlaze contains over 70 user-configurable options, enabling
virtually any processor use case from a very small footprint state
machine or microcontroller to a high performance compute-intensive
micrprocessor-based system running Linux, operating in either 3-stage
pipeline mode to optimize size, or 5-stage pipeline mode to optimize
speed delivering faster DMIPs performance than any other
Extreme configurability is at the heart of MicroBlaze’s flexibility,
but you don’t have to memorize a manual to learn how to configure
MicroBlaze. Through the MicroBlaze Configuration Wizard included in
Xilinx Platform Studio – a few mouse clicks lets you quickly select
between six common microprocessor use models. The configuration wizard
delivers instant feedback through a meter display on resource
utilization and performance, and runs in wizard mode for fast setup, or
advanced mode for access to the lowest level details.
New version 8 features expand MicroBlaze capabilities even further
Over the past year Xilinx has added new features to MicroBlaze to enhance embedded system performance, with capabilities like:
- Relocatable base vector addresses for maximum memory sharing flexibility when using MicroBlaze in Zynq-7000 AP SoC devices
- New Sleep instruction enhances MicroBlaze low-power performance
- IO Module enhancements adds GPI interrupts, and programmable UART baud rate. Can be used with either MicroBlaze_MCS or full MicroBlaze
- LMB BRAM interface controller now supports multiple LMB busses
- New low latency interrupts where the controller directly supplies the interrupt vector for each individual interrupt, lowering latency response by as much as 10X depending on system design.
- Embedded designers can now add a new AXI System Cache soft-peripheral to any memory controller-based design.
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